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Add a NEON packed flow tracer for arm64 - #78
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- fmla count: 272 (16 x 16 + 16) for the fused position update, not 255. - K = 4 vs K = 16: K = 4 is 18 % / 53 % slower, not 14 % / 34 %. - 4T rows are unpinned, not P-core only. - Open item: GCC on Linux aarch64 likely breaks bitwise parity. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
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* Further optimzations of flow tracking * Reproduce on laptop CPU, add prompts for MAC and WIN optimization * Add a NEON packed flow tracer for arm64 (#78) * Add a NEON packed flow tracer for arm64 * Correct the Apple Silicon section of the flow performance notes - fmla count: 272 (16 x 16 + 16) for the fused position update, not 255. - K = 4 vs K = 16: K = 4 is 18 % / 53 % slower, not 14 % / 34 %. - 4T rows are unpinned, not P-core only. - Open item: GCC on Linux aarch64 likely breaks bitwise parity. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com> --------- Co-authored-by: Constantin Pape <constantin.pape@informatik.uni-goettingen.de> Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com> * Update kernel selection logic --------- Co-authored-by: Anwai Archit <anwai.archit@gmail.com> Co-authored-by: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
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Okay so quoting Claude here (see screenshot below ;)) haha
I briefly reviewed it and looks okay -- there's definitely an advantage in this round of implementation it did. Please feel free to takeover @constantinpape