Verilog 10 7
Verilog 23 19
Verilog 1 3
Forked from efabless/caravel
Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.
Verilog 6 7
Shell 2 1
Forked from TinyTapeout/ttsky-verilog-template
Submission template for Tiny Tapeout SKY130 (ChipFoundry) shuttles - Verilog HDL Projects
Verilog
Switched-Capacitor Filter/Gain
Synchronous ROM macro family in 4K, 8K and 32K configurations (SkyWater 130nm).
ChipFoundry IP (review draft)
POR & Initialization Sequencer
100 MHz PLL hard macro for SkyWater 130 nm
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